Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Microchip Technology/ATSAML11E14A/TRAM/INTENSET#0x0
Interrupt Enable Set
TrustRAM Readout Error Interrupt Enable
Data Remanence Prevention Ended Interrupt Enable
https://github.com/cmsis-svd/cmsis-svd-data